[libre-riscv-dev] [Bug 216] LOAD STORE buffer needed

bugzilla-daemon at libre-soc.org bugzilla-daemon at libre-soc.org
Sun May 24 20:39:25 BST 2020


--- Comment #42 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Luke Kenneth Casson Leighton from comment #41)

> > I began working on the elaboratable function of the DataMerger class, which I still haven't commited yet.
> > If all bits in addr_array_i are zero the output will be zero too as nothing needs to be merged.
> that would be correct.  it would indicate that the LD/ST unit is idle.

hmmm... the 2D NxN addr_array_i indicates address matches.  if we assume that
the array that the diagonal (X=Y i.e. addr[n,n]) will always be set for any
LD/ST then there will always be one active LD/ST.

this is kind-of "the address matches against itself".

thus, if there is only one LD/ST, and it is from unit 5, then addr_array_i[5,5]
will be TRUE

thus, yes, we can assume that when all bits in addr_array_i are zero, the LD/ST
unit is idle.

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