[libre-riscv-dev] [Bug 70] evaluate Bus Architectures

bugzilla-daemon at libre-soc.org bugzilla-daemon at libre-soc.org
Wed May 20 07:47:33 BST 2020


--- Comment #11 from Jacob Lifshay <programmerjake at gmail.com> ---
discovered that there are already quite a few protocols that are much more
widely used than omnixtend that support cache coherent memory access over a
network: google "rdma cache coherent"

You are receiving this mail because:
You are on the CC list for the bug.

More information about the libre-riscv-dev mailing list