[libre-riscv-dev] [Bug 70] evaluate Bus Architectures

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=70

--- Comment #11 from Jacob Lifshay <programmerjake at gmail.com> ---
discovered that there are already quite a few protocols that are much more
widely used than omnixtend that support cache coherent memory access over a
network: google "rdma cache coherent"

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