[libre-riscv-dev] PowerISA 3.1 (Power10) spec released
programmerjake at gmail.com
Tue May 12 07:27:38 BST 2020
On Mon, May 11, 2020, 23:01 Lauri Kasanen <cand at gmx.com> wrote:
> The thing that stood out to me in the levels was BE/LE. An int or float
> compatible Power processor must support BE, LE is optional at those
> levels. A Linux level processor must support LE, BE is optional at that
> level. However the Linux level requires SIMD.
> So this means that our int+float processor must support BE.
not necessarily, it defines 4 compatibility levels, notice that all
features included in higher levels are not forbidden in lower levels, so we
could claim to be 100% compatible with the lowest level and we could still
implement nearly everything from higher levels, we just couldn't claim to
implement the named int+fp level. We could still claim to implement fp
instructions (assuming we actually do) and to be totally compatible with
LE-only int+fp (which we should probably ask OpenPower to add as a
Note that the levels aren't strictly subsets of each other, so they're more
like named feature sets rather than levels.
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