[libre-riscv-dev] PowerISA 3.1 (Power10) spec released

Lauri Kasanen cand at gmx.com
Tue May 12 07:01:44 BST 2020


The thing that stood out to me in the levels was BE/LE. An int or float
compatible Power processor must support BE, LE is optional at those
levels. A Linux level processor must support LE, BE is optional at that
level. However the Linux level requires SIMD.

So this means that our int+float processor must support BE.

- Lauri

More information about the libre-riscv-dev mailing list