[libre-riscv-dev] PowerISA 3.1 (Power10) spec released
Lauri Kasanen
cand at gmx.com
Tue May 12 07:44:13 BST 2020
On Mon, 11 May 2020 23:27:38 -0700
Jacob Lifshay <programmerjake at gmail.com> wrote:
> On Mon, May 11, 2020, 23:01 Lauri Kasanen <cand at gmx.com> wrote:
>
> > Hi,
> >
> > The thing that stood out to me in the levels was BE/LE. An int or float
> > compatible Power processor must support BE, LE is optional at those
> > levels. A Linux level processor must support LE, BE is optional at that
> > level. However the Linux level requires SIMD.
> >
> > So this means that our int+float processor must support BE.
>
> not necessarily, it defines 4 compatibility levels, notice that all
> features included in higher levels are not forbidden in lower levels, so we
> could claim to be 100% compatible with the lowest level
No, we couldn't. The lowest level, int only, has the same BE
requirement.
- Lauri
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