[libre-riscv-dev] AMD ISAs
Luke Kenneth Casson Leighton
lkcl at lkcl.net
Wed Jun 10 00:21:27 BST 2020
On Wed, Jun 10, 2020 at 12:15 AM Yehowshua <yimmanuel3 at gatech.edu> wrote:
> All of AMDs ISA are open here.
> https://gpuopen.com/documentation/amd-isa-documentation/ <https://gpuopen.com/documentation/amd-isa-documentation/>
> It may be worthwhile trying to make our GPU “appear” to be an AMD device.
the problem with doing so is that the processor effectively becomes
"Dual ISA". everyone that we've talked to with significant experience
in processor design has raised eyebrows at the complexity involved in
a dual-ISA design.
it is not an insurmountable issue: it just should in no way be
underestimated, for the trade-off of not having to write any kinds of
in addition, we need to consider that the level of instruction
compression (which reduces shared L1 I-Cache usage) anticipated
through the hardware-level compression in SimpleV will be completely
unobtainable for AMDGPU ISA interoperability... because we will be
forced *to* have AMDGPU ISA interoperability.
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