[libre-riscv-dev] [Bug 339] create POWER9 ROTATE (SHIFTROT) pipeline

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=339

--- Comment #7 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
sradi is different

carry <- s & ((r& ¬m) != 0) CA <- carry CA32 <- carry

best add CA and CA32 to the fields that can be returned.

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