[libre-riscv-dev] [Bug 120] implement RISC-V FSGNJ instruction

bugzilla-daemon at libre-riscv.org bugzilla-daemon at libre-riscv.org
Sun Jan 26 22:34:08 GMT 2020


http://bugs.libre-riscv.org/show_bug.cgi?id=120

--- Comment #8 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Michael Nolan from comment #7)
> Thanks for the help! I have something working more or less,

cool that was quick. mind you i only allocated a small budget to it precisely
because it was likely to be.

i'd say commit and push it however i need your agreement (on-list) to the
charter, first.

if you can do that first, then i can add your ssh key, then push, then review,
then approve, and then we can set you up an RfP.

apologies it's quite a few hoops, i am delighted that someone else is happy to
work on the FPU.

> but I'd like to
> formally verify it too.

that's a little trickier as it's outside of everyone currently in the teams'
experience. and also a separate bugreport. and a different Grant etc etc

-- 
You are receiving this mail because:
You are on the CC list for the bug.


More information about the libre-riscv-dev mailing list