[libre-riscv-dev] System-Wide Complexity Rant (was store computation unit)
Luke Kenneth Casson Leighton
lkcl at lkcl.net
Wed Jun 5 08:34:58 BST 2019
On Wed, Jun 5, 2019 at 8:26 AM Jacob Lifshay <programmerjake at gmail.com> wrote:
> > > I recall x86 being able to enable cache-as-ram mode to allow using much
> > > more than 16-32k of memory before initializing the dram controllers.
> > nice. the joys of having billion-dollar budgets, eh? :)
> it doesn't actually sound very hard to implement, all you need is a few
> muxes in the last-level-cache, which I think we should implement as it
> sounds very useful for boot.
worth pursuing. main barrier would be if it adversely affects
performance or adds in too much latency.
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