[Libre-soc-bugs] [Bug 982] Support PowerPC ABI in ISACaller

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=982

--- Comment #129 from Dmitry Selyutin <ghostmansd at gmail.com> ---
OK, enabling this bit fixes the SRR1:

        SRR1[PIb.TRAP] = 1

https://git.libre-soc.org/?p=openpower-isa.git;a=commitdiff;h=75887d596e2d067931382d20b2885d93be86c878

Still no glue about MSR, it has several bits inactive after the code gets
executed.

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