[Libre-soc-bugs] [Bug 865] implement vector bitmanip opcodes

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=865

--- Comment #7 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
https://git.libre-soc.org/?p=libreriscv.git;a=blob;f=openpower/sv/bmask.py;hb=HEAD

this is currently producing the right answer for the first
example params when mode=0b001110 but not the others, when
mask is non-zero

  30      m  = 0b11000011
  31      v3 = 0b10010100 # vmsbf.m v2, v3
  32      v2 = 0b01000011 # v2

it's important to replicate the full functionality of sof/sif/sbf
and that includes having a "predicate mask" (aka, a GPR which might
happen to be r3, r10 or 31)

i'm currently brute-force experimenting with bmask.py to find
something vaguely resembling the output of sbf.py

https://git.libre-soc.org/?p=libreriscv.git;a=blob;f=openpower/sv/sbf.py;hb=HEAD

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