[Libre-soc-bugs] [Bug 865] implement vector bitmanip opcodes

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=865

--- Comment #6 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Andrey Miroshnikov from comment #4)
> The nomenclature for pseudo-code is in the PowerISA spec, sections 1.3.2
> onwards.
> 
> These are the instructions Luke gave at the end of the call yesterday:
> pywriter 
> add av.mdwn 
> pywriter noall av
> 
> I added the changes to av.mdwn and minor_22.csv (don't have write permission
> to openpower-isa, will push once given).
> 
> Now on to some question:
> 
> Does cprop stand for Carry Propagate? 

yes.

> What does it actually do?

computes the carry bit(s) needed for big-integer math in a single
instruction.

> Does it take
> bits lower down, and shift them up?
> I tried calculating the pseudo-code with two 4-bit numbers (RA:1011,
> RB:0110, result: 1111) on paper, didn't understand the signifance of the
> result.
> 
> Also is cprop a bitmanip instruction?

yes.

> If so, does it need to go into bitmanip.mdwn?

doesn't matter for now

> In the minor_22.csv, the entries are:
> opcode,unit,internal op,in1,in2,in3,out,CR in,CR out,inv A,inv out,cry
> in,cry ou
> 
> From the pseudo-code alone I can't tell if carry in/out are being used.

look at fixedarith.mdwn.

>  It
> looks like there are only two inputs: RA, RB; one output RT.

and a co-result, CR0 (which comes from the Rc=1 option) hence
why the page needs two entries "cprop RT,RA,RB" *and* "cprop. RT,RA,RB"

> After looking
> at other instructions, Rc seems to determine something (1-bit bitfield).

yes.  remember i said "just cookie-cut maxs literally", that includes
its entry in minor_22.csv (sorry forgot to emphasise that)

just cut/paste that line, update column 1 (---NNNNNN), update column 2
(s/maxs/cprop), and the rest is good.

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