[libre-riscv-dev] [Bug 323] create POWER9 MUL pipeline

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=323

--- Comment #3 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
from microwatt: how to set up the inputs to the mul pipeline.  this can go in
main_stage.py when calling the mul unit:



if e_in.is_32bit = '1' then
    if e_in.is_signed = '1' then
        x_to_multiply.data1 <= (others => a_in(31));
        x_to_multiply.data1(31 downto 0) <= a_in(31 downto 0);
        x_to_multiply.data2 <= (others => b_in(31));
        x_to_multiply.data2(31 downto 0) <= b_in(31 downto 0);
    else
        x_to_multiply.data1 <= '0' & x"00000000" & a_in(31 downto 0);
        x_to_multiply.data2 <= '0' & x"00000000" & b_in(31 downto 0);
else
    if e_in.is_signed = '1' then
        x_to_multiply.data1 <= a_in(63) & a_in;
        x_to_multiply.data2 <= b_in(63) & b_in;
    else
        x_to_multiply.data1 <= '0' & a_in;
        x_to_multiply.data2 <= '0' & b_in;

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