[libre-riscv-dev] [Bug 305] Create Pipelined ALU similar to alu_hier.py

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=305

--- Comment #86 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
i think the best we can do is, when Rc=0, disable reading of XER.so

Rc=1 basically makes a hell of a mess of the dependencies.

-- 
You are receiving this mail because:
You are on the CC list for the bug.