[libre-riscv-dev] daily kan-ban update 26may2020

Luke Kenneth Casson Leighton lkcl at lkcl.net
Tue May 26 20:46:44 BST 2020

On Tue, May 26, 2020 at 7:00 PM Cole Poirier <colepoirier at gmail.com> wrote:
> On May 26 2020, at 10:35 am, Luke Kenneth Casson Leighton
> <lkcl at lkcl.net> wrote:
> > i have a feeling we just call RegFileArray.read_port() and write_port,
> > then not let anyone access the 8 reg-ports, throw away the "global"
> > thing and create the alternative one.
> Having done a close read of regfile/virtual_port.py (apologies for
> giving a "terrible name for a complex register"),

it works :)

> and reviewing the
> yosys show top logic diagram I think I mostly understand what's going on
> in this module.

it's basically multiplexing between 8 individual ports and 1 massive
port that hits absolutely all of the (8) ports at once.

which, when put like that, we might as well do exactly that.

> Regarding the "global" thing, are you referring to the self.wr/rd_ports
> "for external use"? We should instead just use the existing methods on
> RegFileArray to set up the external ports? How do we go about not
> letting anyone access the 8 reg-ports?

that's the Dep-Matrices job.  or, more to the point: the PriorityPickers.


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