[libre-riscv-dev] [Bug 336] ALU CompUnit needs to recognise that RA (src1) can be zero

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=336

--- Comment #21 from Cesar Strauss <cestrauss at gmail.com> ---
(In reply to Luke Kenneth Casson Leighton from comment #1)
> * third - and this is the kicker - that the FSM for src1_i needs a Mux to
> select RA or zero *and* it needs to *no longer* request a READ for src1
> (rd.req[0]) if the ra_is_zero flag is set.
> 
> * additionally that if the z flag is set, the rd_done part of the FSM does
> NOT wait for GO_READ on the src1 port (rd.go[0])

Just a reminder that the FSM still needs adjustment for rd.rel/rd.go. Checked
in GTKWave that rd.rel is still being set unconditionally after issue_i.

-- 
You are receiving this mail because:
You are on the CC list for the bug.