[libre-riscv-dev] [Bug 336] ALU CompUnit needs to recognise that RA (src1) can be zero

bugzilla-daemon at libre-soc.org bugzilla-daemon at libre-soc.org
Sun May 24 02:46:13 BST 2020


https://bugs.libre-soc.org/show_bug.cgi?id=336

--- Comment #12 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
https://git.libre-soc.org/?p=nmutil.git;a=blob;f=src/nmutil/test/test_buf_pipe.py;hb=HEAD

just occurred to me, see class Test3, this nay be simpler to start from.

remove the for loops for now, add a parameter read_idx to the send function,
and write_idx to rcv function.

read_idx will refer to self.compunit.rd.rel[read_idx] you see how that would
go?

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