[libre-riscv-dev] daily kan-ban update 20may2020

Luke Kenneth Casson Leighton lkcl at lkcl.net
Wed May 20 15:14:11 BST 2020

* more pipeline stuff with michael and cole and jacob.  researched
TRAP ops in particular
* identified that MUL and DIV have similar register allocation to
* moved MUL and DIV ops to their own respective Function Unit
(power_enums.py, csv files)
* talked with Marketnext about the resource requirements for the May
30 Hackathon.
* worked out from this image that we need to do pretty much the same thing: give
  each FunctionUnit a "consistent uniform interface" of its register
port allocation.

this morning:
* created nmutil exts helper function and used it everywhere (OP_EXTS
and other places)
* helped Jean-Paul to understand the requirements for regular
coriolis2 layout of the Dep Matrices


* send an agenda to Hugh, Tim, Yehowshua for the bi-weekly OpenPOWER conf call
* received a message from these guys, they would like to do a review
* start putting an "API / Spec" system together for Function Units, to
be able to connect Regfiles to ports.
* do the "Record" conversion of CompALU (part of the API/Spec for FUs)


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