[libre-riscv-dev] [Bug 318] fix LDSTCompUnit

bugzilla-daemon at libre-soc.org bugzilla-daemon at libre-soc.org
Wed May 20 04:09:42 BST 2020


https://bugs.libre-soc.org/show_bug.cgi?id=318

--- Comment #16 from Cesar Strauss <cestrauss at gmail.com> ---
I'll now proceed to improve the unit test for LDSTCompUnit.

I'll take into account your several ideas in comment #11.

Some of my own ideas are:

1) The test driver should only present data during a single cycle, coincident
with the activation of "go". This detects data being latched at the wrong time.

2) Add some behavioral assertions.
For instance, busy_o must rise if, and only if, issue_i was active on the
previous clock.
Likewise "rel" signals must go low if, and only if, the corresponding "go" was
active on the previous clock.
And so on.
There could be a simulation "process" monitoring these kind of conditions. Or,
using nMigen assertions, and/or formal verification. I must find out more about
this.

I still need to study the interface and functionality of the L0CacheBuffer.

Regards,
Cesar

-- 
You are receiving this mail because:
You are on the CC list for the bug.


More information about the libre-riscv-dev mailing list