[libre-riscv-dev] [Bug 313] Create Branch Pipeline for POWER9
bugzilla-daemon at libre-soc.org
bugzilla-daemon at libre-soc.org
Tue May 19 22:02:23 BST 2020
https://bugs.libre-soc.org/show_bug.cgi?id=313
--- Comment #24 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
ehn? any clues, michael?
```
Traceback (most recent call last):
File "fu/branch/test/test_pipe_caller.py", line 134, in run_all
sim = Simulator(m)
File "/home/lkcl/src/libresoc/nmigen/nmigen/back/pysim.py", line 935, in
__init__
self._fragment = Fragment.get(fragment, platform=None).prepare()
File "/home/lkcl/src/libresoc/nmigen/nmigen/hdl/ir.py", line 39, in get
obj = obj.elaborate(platform)
File "/home/lkcl/src/libresoc/nmigen/nmigen/hdl/dsl.py", line 537, in
elaborate
fragment.add_subfragment(Fragment.get(self._named_submodules[name],
platform), name)
File "/home/lkcl/src/libresoc/nmigen/nmigen/hdl/ir.py", line 39, in get
obj = obj.elaborate(platform)
File "/home/lkcl/src/libresoc/nmigen/nmigen/hdl/dsl.py", line 537, in
elaborate
fragment.add_subfragment(Fragment.get(self._named_submodules[name],
platform), name)
File "/home/lkcl/src/libresoc/nmigen/nmigen/hdl/ir.py", line 39, in get
obj = obj.elaborate(platform)
File "/home/lkcl/src/libresoc/soc/src/soc/decoder/power_decoder.py", line
315, in elaborate
m = PowerDecoder.elaborate(self, platform)
File "/home/lkcl/src/libresoc/soc/src/soc/decoder/power_decoder.py", line
262, in elaborate
comb += self.op._eq(row)
File "/home/lkcl/src/libresoc/soc/src/soc/decoder/power_decoder.py", line
139, in _eq
self.internal_op.eq(InternalOp[row['internal op']]),
File "/usr/lib/python3.7/enum.py", line 351, in __getitem__
return cls._member_map_[name]
KeyError: 'OP_TDI'
```
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