[libre-riscv-dev] daily kan-ban update 19may2020

Michael Nolan mtnolan2640 at gmail.com
Tue May 19 18:47:28 BST 2020

Today I was going to try and work on the trap block, but it looks like 
Luke is already working on defining the registers for it and I don't 
want to interfere.

I was able to modify caller.py to correctly generate carries, and added 
checking of the carry bit to the alu unit tests. One snarl with that 
though is I am unable to get qemu to show modifications to the carry bit 
in XER for some reason. This isn't an issue for carry (or overflow), but 
it would be good to have for the 32 bit carry and overflow. I may need 
to hold off on the 32 bit versions until I'm able to run tests on a real 
power machine.

I also looked at the differences between nmutil.clz and nmigen's 
PriorityEncoder, and summarized them in 


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