[libre-riscv-dev] daily kan-ban update 19may2020

Luke Kenneth Casson Leighton lkcl at lkcl.net
Tue May 19 13:36:18 BST 2020


On Tuesday, May 19, 2020, Luke Kenneth Casson Leighton <lkcl at lkcl.net>
wrote:

except, i can't complete the diagram because i am blocked waiting for Jacob
> to do the DIV and MUL pipelines, which we have found highlights clearly
> what regs are needed in ways that a cursory examination does not reveal.
>

after doing some preliminary checks we also have a block on the reg
allocation task for a TRAP pipeline.

i think what i will do is, morph CompALUUnit to use a Record.

Cesar, CompLDSTUnit also will need converting to use a Record.

this because when grouping the CompUnits together it is a lot easier to do
so using arrays of Records.

however if i do CompALU first you will get an idea of what it will look
like and so are not surprised by code changes.

i will create "dummy" variables in the classes so that it does not require
massive code changes.

l.



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