[libre-riscv-dev] [Bug 318] fix LDSTCompUnit

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=318

--- Comment #14 from Cesar Strauss <cestrauss at gmail.com> ---
Dear Luke,

I see uses of "latchregister" and "SRLatch" in code. In the nMigen library,
they are internally implemented with synchronous logic, although partly
resembling the function of their asynchronous equivalents.

Do you, by any chance, intend to replace them, in the ASIC, with real
asynchronous latches? As depicted in several diagrams at
https://libre-soc.org/3d_gpu/architecture/6600scoreboard/ ?

Regards,
Cesar

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