[libre-riscv-dev] [Bug 313] Create Branch Pipeline for POWER9

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=313

--- Comment #20 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
michael is this correct?

            # Yes, the CTR only counts 32 bits
            ctr = Signal(64, reset_less=True)
            comb += ctr.eq(self.i.ctr - 1)

that's 64-bit for ctr, and the input self.i.ctr is also 64-bit

-- 
You are receiving this mail because:
You are on the CC list for the bug.