[libre-riscv-dev] [Bug 313] Create Branch Pipeline for POWER9

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=313

--- Comment #13 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
ahhh hang on: just looking at decoder/isa/system.py as well

that will take in... either:

* CTR for rfsvc
* SRR1 for one of the other ops
* HSRR1 for another

so yes!  CTR should remain named "spr" (or better, be named "spr1").

however the 2nd one... ahh op_rfid refers to *both* MSR *and* SRR1
so it should be called "spr2".

then, the execution issue will have to

* hard-decode the operations to detect which SPR is to go to spr1 and which to
spr2
* put those SPR numbers into the SPR-Dependency-Matrix

and in this way, the right SPRs will arrive at spr1 and spr2

we should record those somewhere.... hmmm... in the BranchInputData file for
now?

-- 
You are receiving this mail because:
You are on the CC list for the bug.