[libre-riscv-dev] [Bug 305] Create Pipelined ALU similar to alu_hier.py

bugzilla-daemon at libre-soc.org bugzilla-daemon at libre-soc.org
Thu May 14 20:06:50 BST 2020


https://bugs.libre-soc.org/show_bug.cgi?id=305

--- Comment #67 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Luke Kenneth Casson Leighton from comment #66)

> i added popcount (because).  it looks like it works except test_cmpb is
> not working

after updating submodules (will commit in a sec)

  File "/home/lkcl/src/libresoc/soc/src/soc/decoder/isa/fixedlogical.py", line
193, in op_cmpb
    if eq(RS[8 * n:8 * n + 7 + 1], RB[8 * n:8 * n + 7 + 1]):
NameError: name 'RS' is not defined

-- 
You are receiving this mail because:
You are on the CC list for the bug.


More information about the libre-riscv-dev mailing list