[libre-riscv-dev] [Bug 305] Create Pipelined ALU similar to alu_hier.py

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=305

--- Comment #59 from Michael Nolan <mtnolan2640 at gmail.com> ---
*headdesk*
cmp is BACKWARDS! 

The following will run both a subtract from and cmp and save their respective
updates to cr0 to r2 and r1 respectively:

        li 6, 0x10
        li 7, 0x05     # set up inputs
        li 1, 0
        mtcr 1         # clear cr
        subf. 5, 6, 7  
        mfcr 2         # save cr to r2
        mtcr 1         # clear cr again
        cmpl cr0, 1, 6, 7   # This *should* give the same result as the subf
above
        mfcr 1         # save cr to r1


(gdb) p/x $r1
$1 = 0x40000000
(gdb) p/x $r2
$2 = 0x80000000

Why IBM, why did you do this?

-- 
You are receiving this mail because:
You are on the CC list for the bug.