[libre-riscv-dev] daily kan-ban update 13may2020

[Luke Kenneth Casson Leighton]

yesterday i started on integrating the LDSTCompUnit into the
scoreboard and immediately ran into a brick wall in the form of the
address-request/release signalling.  when go_addr is raised (in
response to req_addr), the LDSTCompUnit is supposed to drop req_addr
one cycle later: instead it stays high.

i also investigated microwatt to find out what the heck is going on
with the register-order-swapping.  turns out that different classes of
operations (logical, rotate, arith) have different ordering.  why? who
knows.

today i will continue working through the address-negotiation in LDSTCompUnit.

l.