[libre-riscv-dev] [Bug 305] Create Pipelined ALU similar to alu_hier.py

bugzilla-daemon at libre-soc.org bugzilla-daemon at libre-soc.org
Sun May 10 05:25:04 BST 2020


https://bugs.libre-soc.org/show_bug.cgi?id=305

--- Comment #27 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Michael Nolan from comment #26)
> I just realized I'm going to run into some difficulty with rlwinm, as the
> values controlling the mask amounts (MB and ME) aren't exposed by
> Decode2ToExecute1. Should they be added, or is there another path you think
> we should take for things like this (there are almost certainly other
> instructions with fields like that).

hmm hmm don't know.  microwatt throws the actual instruction opcode around, as
a global, which is fine for single issue

for a large scale multi issue processor with pipelines, not so much.

option 1

* pass the undecoded insn via Execute1Tyoe and add the POWER decoder "field
selector" to pspec.  this will get the bitfields and forms etc

option 2

* add mb and me and slowly more and more copies of fields over time.

honestly we will probably have to do (1) sooner rather than later although  (2)
is the easier option.

any other ideas?

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