[libre-riscv-dev] MMU + TLB idea

Michael Nolan mtnolan2640 at gmail.com
Fri May 8 00:39:08 BST 2020

I remember some time ago working on a powerpc core that (I think) had a 
partly software MMU. It got me thinking: we could have a TLB and the 
machinery to look up entries in it and translate the addresses in 
hardware, and implement the page table walking and such in software (via 
a trap). This would I think cut down the work in implementing the MMU by 
making it so we don't need to implement the page table walking machinery 
in hardware, and make it a bit easier to test. The downside of course 
would be that TLB misses would be slower, but I think it might be a 
decent trade-off for our first attempt at the MMU.



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