[libre-riscv-dev] 4 Simulators?
Luke Kenneth Casson Leighton
lkcl at lkcl.net
Thu May 7 19:23:28 BST 2020
On Thursday, May 7, 2020, Yehowshua <yimmanuel3 at gatech.edu> wrote:
> Hello all - I recently became aware that there a 4 different POWER
> simulators being worked on?
pearpc and the autogenerated one.
This is not a good use of resources given that we have access to a
> bare-metal Talos II.
it really does not help us except when it comes to FP interoperability.
also the qemu pipe is already done and has rhe advantage of acting like a
local POWER machine instead of forcing development to have a permanent hard
> We can literally run arbitrary instructions on in remotely - this means a
> simulator should be low priority given that we have an October deadline.
unlike in RISCV we do not have a cycle accurate simulator, we do not have
formal test suites or in fact any asseembly level test suites at all.
therefore as i outlined already a few weeks ago the strategy is to side by
side bootstrap up the following simultaneously and run the EXACT same
instructions on each:
* python simulator
* pearpc simulator pipe (when ready)
* qemu pipe
* bare metal pipe (run on the talos server)
* hardware simulation pipe
i would suggest adding power-gem5 to that list except the build
dependencies are enormous and it leaks 500mb/sec.
by doing side by side comparisons we have a means to bootstrap our way up.
cutting back actually *slows* the project by removing routes to verify the
correctness of our implementation.
also because "doing is learning" the development of the simulators teaches
us what is needed far faster than the HDL could ever be written without
crowd-funded eco-conscious hardware: https://www.crowdsupply.com/eoma68
More information about the libre-riscv-dev