[libre-riscv-dev] [Bug 296] idea: cyclic buffer between FUs and register file

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=296

--- Comment #14 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
i've updated the descriptive text at the page:
https://libre-soc.org/3d_gpu/architecture/regfile/

a review and commentary appreciated, so that architecturally this is
understood, and any potential errors and omissions detected.

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