[libre-riscv-dev] [Bug 296] idea: cyclic buffer between FUs and register file

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=296

--- Comment #13 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
https://libre-soc.org/3d_gpu/architecture/regfile/

created a new page (for regfiles in general), it's a near-duplicate
of a very early diagram written out last year, except this time
the PartitionedSignal-baesd Pipelines, and Function Units, as well as
the cyclic buffers, are now included.

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