[libre-riscv-dev] Status on Our RISCV Implementation
Luke Kenneth Casson Leighton
lkcl at lkcl.net
Tue Mar 24 20:12:12 GMT 2020
On Tuesday, March 24, 2020, Jacob Lifshay <programmerjake at gmail.com> wrote:
However, it's perfectly possible to have software that catches the illegal
> instruction traps and emulates them, allowing running a RISC-V kernel.
oh. yes. good point. qemu will be doing something like this, i believe?
crowd-funded eco-conscious hardware: https://www.crowdsupply.com/eoma68
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