[libre-riscv-dev] Status on Our RISCV Implementation

Immanuel, Yehowshua U yimmanuel3 at gatech.edu
Tue Mar 24 13:11:27 GMT 2020

> nope.  not for RISC-V.  userspace only.

So I guess we’d have a POWER kernel…
If a binary tries to call RISCV instructions to set supervisor mode register - how is that handled?


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