[libre-riscv-dev] LibreSOC - RISCV and POWER dual architecture feasibility

Luke Kenneth Casson Leighton lkcl at lkcl.net
Sun Mar 15 19:57:52 GMT 2020

On Sun, Mar 15, 2020 at 7:53 PM Immanuel, Yehowshua U
<yimmanuel3 at gatech.edu> wrote:

> But yeah, the main thought in my head for sticking with a single ISA is power consumption.

it's all at the translation (decoder), phase, yehowsua.   the choice
of ISA is a 33rd bit, and once decoded to that "internal" format,
it's... nothing.


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