[libre-riscv-dev] LibreSOC - RISCV and POWER dual architecture feasibility

[Jacob Lifshay]

On Sun, Mar 15, 2020, 12:33 Immanuel, Yehowshua U <yimmanuel3 at gatech.edu>
wrote:

> Who knows, I could be wrong. Maybe people really would find a use for dual
> ISAs - but up front, to investor for example, and to me, it looks
> unnecessary.


In my opinion, dual ISAs is a significant advantage that basically no one
else has, since it allows us to run both Power and RISC-V software at full
speed, it's also useful for on a test server where people need to test both
Power and RISC-V software (where QEMU isn't good enough).

Later (for Libre-SOC v2 or v3), it might be a good idea to add support for
x86 and x86_64 user-mode since the patents for the base ISA will have
expired by then. This would help give us an advantage since it would allow
us to run legacy software.

Jacob