[libre-riscv-dev] [Bug 186] Create decoder for SOC: Power ISA and RISC-V

[bugzilla-daemon at libre-riscv.org]

http://bugs.libre-riscv.org/show_bug.cgi?id=186

--- Comment #68 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
*face-palm*.  i went to all the trouble of putting the fields into
a text file yesterday, thinking that there was missing information,
wrote a parser for it... then realised that the 3.0B specification
had everything that's needed.

example:

EO (11:15)
    Expanded opcode field
    Formats: VX, X, XX2

that was the information i thought was missing (the Formats).
the idea was: parse the entirety of the opcode-format tables,
extract the Formats that they apply to.  then in the nmigen
code, it's possible to create structures where we can do:

(start, end) Formats.VX.EO[0:1]

but... duhhh, that's already in section 1.7 of 3.0B duhhh, you
can see above.

*sigh*.

well, at least we have a consistency checker.

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