[libre-riscv-dev] [Bug 186] Create decoder for SOC: Power ISA and RISC-V

bugzilla-daemon at libre-riscv.org bugzilla-daemon at libre-riscv.org
Thu Mar 5 22:06:08 GMT 2020


http://bugs.libre-riscv.org/show_bug.cgi?id=186

--- Comment #67 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
ok i've written a parser for the fields.txt file, the idea being that
it will create a series of objects that can be walked inside the code
to access fields by an appropriate name, depending on the context
(the instruction, basically).

those data structures should not need to go actually into the HDL
(i don't think), they are there to be used in the appropriate code
(the load function and so on) or perhaps as a case/switch statement
like in PowerDecoder to get the appropriate register entries and
other fields.

have to see how it goes, i think.

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