[libre-riscv-dev] Why nMigen?
Luke Kenneth Casson Leighton
lkcl at lkcl.net
Mon Mar 2 21:21:19 GMT 2020
On Monday, March 2, 2020, Immanuel, Yehowshua U <yimmanuel3 at gatech.edu>
> This is all sound reasoning and I’ve had comparable experiences myself.
> I’ve had quite some trouble with BSV awkwardness.
> The BSV manual is comprehensive - but I had to refer to it so much because
> BSV fundamentally isn’t intuitive.
yehyeh. the advantages are pretty big, however. the compiler-simulator is
20x faster than verilator
> I think PyRTL is unfortunately no longer maintained.
> Scala is a bit of a different paradigm and not super accessible
> Not to mention how slow and spaghetti filled SBT is
oh that's another thing. by looking at yosys graphviz output regularly, it
is still actually possible to relate the hardware to the original nmigen
code because signal names are preserved.
> I’ll at some point add all these thoughts to the page talking about our
> rationale for nMigen...
that would be great. and move the links currently in tutorial page to it?
crowd-funded eco-conscious hardware: https://www.crowdsupply.com/eoma68
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