[libre-riscv-dev] libresoc memory architecture

Michael Nolan mtnolan2640 at gmail.com
Tue Jun 23 21:02:36 BST 2020

On 6/23/20 3:52 PM, Luke Kenneth Casson Leighton wrote:
>   first, we need to make sure to capture those spec references, can you add
> a crossref to the archives onto the architecture/cachemem page ?
> ok, so the hardware function i mentioned, i had to design one that was
> autogenerated by the pinmux program, when helping IIT Madras.
> question: where do the PowerISA MMU tables get the information from about
> which bits are IO, RAM, or other?
> answer: they come from the information about the physical memory map.
Wouldn't they come from the software that sets up the page tables?

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