[libre-riscv-dev] Minerva L1 Cache

Yehowshua yimmanuel3 at gatech.edu
Mon Jun 15 21:30:56 BST 2020

> I reached out to Jean Paul from lambda concepts about this.
> Once I figure out exactly how Minerva core works - I’ll write a 
> tiny unit bench for it. Hopefully this would be helpful in modifying
> it for our needs.

Actually - I figured it out.

Stage1 and stage2.

Stage1 is address pre-fetch.
Stage 2 is actual fetch.


More information about the libre-riscv-dev mailing list