[libre-riscv-dev] [Bug 336] ALU CompUnit needs to recognise that RA (src1) can be zero

bugzilla-daemon at libre-soc.org bugzilla-daemon at libre-soc.org
Mon Jun 8 02:20:16 BST 2020


https://bugs.libre-soc.org/show_bug.cgi?id=336

--- Comment #55 from Cesar Strauss <cestrauss at gmail.com> ---
(In reply to Luke Kenneth Casson Leighton from comment #54)
> oh wait... that's a *combinatorial* ALU?  iinteresting.  i wonder
> what that could be used for.

Well, the ALU output is already latched in MultiCompUnit. Maybe having another
output register, inside the ALU itself, is redundant?

> hmmm i tried putting OP_NOP in there, and both compunit1 and parallel
> locked up.  this tends to indicate a combinatorial loop.  any clues?

I see. I'm looking into it.

-- 
You are receiving this mail because:
You are on the CC list for the bug.


More information about the libre-riscv-dev mailing list