[libre-riscv-dev] "simple" core

[Cole Poirier]

On Jun 7 2020, at 4:58 pm, Luke Kenneth Casson Leighton <lkcl at lkcl.net> wrote:

> On Mon, Jun 8, 2020 at 12:54 AM Cole Poirier <colepoirier at gmail.com> wrote:
> 
>> > python3 soc/simple/test/test_core.py
>> 
>> Just ran it. SO COOL!!
> 
> :)
> 
> i have to get LDSTCompUnit operational (the L0CacheBuffer memory
> alignment), then i'm happier adding it in.  right now it hangs if you
> send it two instructions, for example - we can't have that as it would
> stop core.py from working, as well.
> 
>> Looking forward to seeing this all come together as the rest has so far.
>> And hopefully contributing a little :)
> 
> you already are! when you've added one instruction into the unit tests
> for TRAP, that's basically (even with one instruction) when it can go
> straight in.  other tests can be added later.
> 
> l.

Thanks! Although I haven't done that yet acutally, I'm trying to get to
it this evening but the Systemes Libres pitch has taken up most of my
afternoon. Will send you and Yehowshua an email about this shortly.

Cole