[libre-riscv-dev] [Bug 363] inconsistency between isel and mfcr and crand unit test on bit-ordering of CR

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=363

--- Comment #10 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Michael Nolan from comment #9)
> GRR. I believe at some point I used the fields directly generated from
> power_fields.py (fields_x['BF'] or something like that), which needed the
> [0:-1]. But since it got changed to use the signals from the decoder, the
> [0:-1] chopped off the top bit.

ohh... :)

> I think I fixed another error in the decoder
> just like that recently,

i spotted that BFA didn't have [0:-1] on it, which was partly the clue
which led me to try the same on BF.

got there in the end.  soc/simple/test/test_core.py now passes and
it runs *all* unit tests.  still TODO, the XER checking though

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