[libre-riscv-dev] [Bug 325] create POWER9 TRAP pipeline

bugzilla-daemon at libre-soc.org bugzilla-daemon at libre-soc.org
Sun Jun 7 01:39:27 BST 2020


https://bugs.libre-soc.org/show_bug.cgi?id=325

--- Comment #65 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Cole Poirier from comment #63)
> (In reply to Luke Kenneth Casson Leighton from comment #60)
> >  161                     with m.If(a_i[MSR_PR]):
> >  162                         msr_o.data[MSR_EE].eq(1)
> >  163                         msr_o.data[MSR_IR].eq(1)
> >  164                         msr_o.data[MSR_DR].eq(1)
> > 
> > and at line 185 comb += is missing
> 
> fixed

superb.  i moved that to a separate function (msr_check_pr) because
it's duplicated.  note that i used the fact that in *both* cases,
the m.If() check comes from the argument that just got copied.

   comb += msr_o.data.eq(a_i)
   with m.If(a_i[MSR_PR]):

is exactly the same as:

   comb += msr_o.eq(a_i)
   with m.If(msr_o[MSR_PR]):

and therefore it is not necessary to pass a_i *and* msr_o into
msr_check_pr().

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