[libre-riscv-dev] [Bug 325] create POWER9 TRAP pipeline

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=325

--- Comment #52 from Cole Poirier <colepoirier at gmail.com> ---
(In reply to Luke Kenneth Casson Leighton from comment #51)
> i've removed the microwatt pseudocode because it now serves no purpose.
> with microwatt using a_in, b_in and c_in as overloaded-lanes for incoming
> SPRs, it it no longer useful.

Looks good. What can I do now. Is there something left to be done here or
should I move on to another pipeline? I apologize, I cannot determine this for
myself by looking at fu/trap/main_stage.

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