[libre-riscv-dev] [Bug 325] create POWER9 TRAP pipeline

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=325

--- Comment #20 from Cole Poirier <colepoirier at gmail.com> ---
Pushed a commit with my attempt at OP_RFID and OP_SC. Can you take a look at
OP_RFID because I found it hard and confusing to translate? Is the only
remaining TRAP instruction to be implemented OP_ADDPCIS? I see the pseudo code
here for it, but I cannot understand it. Should I look for it's implementation
in microwatt on github?

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