[libre-riscv-dev] [Bug 325] create POWER9 TRAP pipeline

bugzilla-daemon at libre-soc.org bugzilla-daemon at libre-soc.org
Tue Jun 2 12:21:39 BST 2020


--- Comment #15 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---

cole, this is important to understand: you *do not* need to "understand"
what is "going on".  you do not need to read 1,300 page PDFs - in full -
memorised in their entirety - before being able to take action.

this can be extremely uncomfortable.  it feels... "unnatural", like,
"i should know everything because if i don't i might make a mistake or
implement the wrong thing".

sound familiar?

please understand: "understanding" != "action".

the trick that i learned - a long time ago, from doing reverse-engineering -
is to find someone else's *working* implementation, and *without*
perform as direct a one-to-one translation as is humanly and conveniently

forget optimisation.

forget "understanding".

forget even *bug* fixes.

just... get... it... translated.

through that process, it turns out that by walking over the code (which you
quotes don't understand quotes), this puts that code into your brain.

**THEN** when you read the spec - the 1300 page PDF - you go, "ohhhh, yeahhh, i
recognise that.  that's those bits/flags/functions/insert-whatever that i saw
when i was reading and translating the code, line-by-line".

and *NOW* you have quotes understanding quotes.

without having taken that first step, i guarantee to you that you will get
nowhere, fast.

so just - and i mean this literally - translate the comments that i've put
from microwatt execute1.vhdl into nmigen.  you can see how Michael and i
did that already for both OP_TRAP and OP_MFMSR.

i deliberately inserted the original microwatt code even for those, so that
you have a direct side-by-side comparison, and can follow the adage
"A is to B, as C is to D".

you'll also need to translate the bit-patterns MSR_* - this again should be
obvious and easy.

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