[libre-riscv-dev] [Bug 162] New: Formally Verify the FSGNJ module

[bugzilla-daemon at libre-riscv.org]

http://bugs.libre-riscv.org/show_bug.cgi?id=162

            Bug ID: 162
           Summary: Formally Verify the FSGNJ module
           Product: Libre Shakti M-Class
           Version: unspecified
          Hardware: PC
                OS: Linux
            Status: CONFIRMED
          Severity: enhancement
          Priority: ---
         Component: Formal Verification
          Assignee: lkcl at lkcl.net
          Reporter: mtnolan2640 at gmail.com
                CC: libre-riscv-dev at lists.libre-riscv.org
   NLnet milestone: ---

A formal proof for the FSGNJ module has been created here:
https://git.libre-riscv.org/?p=ieee754fpu.git;a=blob;f=src/ieee754/fsgnj/formal/proof_fsgnj_mod.py;h=b960a85c111c0caee39b99eded831d86b02903ad;hb=HEAD

The proof can be run by the following command:

python -m ieee754.fsgnj.formal.proof_fsgnj_mod

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